Phase modulation of a carrier is commonly performed by means of modulating a Phase Locked loop (PLL) generating the carrier using, e.g., a polar modulation architecture. In order to minimize noise from a Phase Locked Loop (PLL), its bandwidth is often relatively small compared to the modulation bandwidth of modern wireless communication protocols like WCDMA and EDGE, and the modulation bandwidth might be only about one fifth of the bandwidth needed for phase modulation. As a consequence, when directly modulating the PLL, it may effectively provide low pass filtering of the phase modulation signal, reducing modulation accuracy.
To compensate for this deficiency, the modulation signal can be pre-compensated by accentuating higher frequencies. In order to do so, one or more frequency characteristics, such as the −3 dB bandwidth, of the PLL must be known. Variations in process parameters, temperature and device matching will cause this bandwidth to differ over temperature and between different samples of the circuit.
Current techniques for measuring the characteristics of the PLL inject a step or impulse and measures how the loop behaves. From this, the bandwidth can be established.
The internal components of a PLL and the functions of a PLL are known as such and will not be discussed in detail in this application. However, it may be mentioned explicitly that feeding back an output signal of a VCO into the loop of a PLL, and this signal being fed back through a divider, through which the fed back VCO signal is divided with a divider value N, thereby feeding back a fraction of the VCO output signal value into the loop may also be known as such.